Instruction coding is most efficient when the target for the conditional jump is in the current code segment and within -128 to +127 bytes of the next instruction's first byte. The jump can also target -32768 thru +32767 (segment size attribute 16) or -2^(31) thru +2^(31) -1 (segment size attribute 32) relative to the next instruction's first byte. The cmp instruction updates the 80x86's flags according to the result of the subtraction operation (dest - src). You can test the result of the comparison by checking the appropriate flags in the flags register. The 80x86 divide instructions perform a 64/32 division (80386 and later only), a 32/16 division or a 16/8 division. These Now replace ADD instruction with CMP instruction. If AH is greater or equal to CH data, then the program counter will jump to the L1 label. Assembly Code ORG 100h .MODEL SMALL .DATA VAR_1 DB 0C9H VAR_2 DB 7AH .CODE MOV AH,VAR_1 MOV AL,VAR_2 ADD AH,CH JAE L1 ADD AH,AL RET L1:ADD AL,AH RET Output 8086 JO Branch Instruction Assembly Example Instruction. Description. MOV. Moves data from register to register, register to memory, memory to register, memory to accumulator, accumulator to memory, etc. LDS. Loads a word from the specified memory locations into specified register. It also loads a word from the next two memory locations into DS register. LES. Gladir.com - Manuel de langage de programmation Assembleur 80x86. CMP :Cette instruction offre la possibilité essentielle de comparer 2 registres ou emplacements de mémoire. Le résultat de la comparaison est indiqué par les indicateurs (registre drapeau du microprocesseur). The 80x86 family, particularly the 80386 and later processors, go much farther, though. Besides the standard logical, shift, and rotate instructions, there are instructions to test bits within an operand, to test and set, clear, or invert specific bits in an operand, and to search for set bits. The cmp instruction works synergistically with Description. LOOP decrements the count register without changing any of the flags. Conditions are then checked for the form of LOOP being used. If the conditions are met, a short jump is made to the label given by the operand to LOOP. If the address-size attribute is 16 bits, the CX register is used as the count register; otherwise the ECX instruction also uses two 'implicit' operands (i.e., operands not mentioned in the instruction) -The CPU's accumulator register -The CPU's EFLAGS register •The accumulator-register (EAX) is both a source-operand and a destination-operand •The six status-bits in the EFLAGS register will get modified, as a 'side-effect' this 80x86 Instruction Reference Instructions are listed in this reference in this general order. Instructions that CMP, DEC, NEG, SBB, SUB - Multiplication: MUL, IMUL, IMUL 2-3 operands (80386) segreg,reg16 segreg,mem16 Notes: 1. Cannot MOVe an immediate value into a segment register